Hierarchical Multiport Memories: A Survey

Authors

  • Babu PR Department of CIS, University of Hyderabad, Hyderabad, India.
  • Rao K Srinivasa TRR College of Engineering, Medak, India.

Keywords:

Centralized Crossbar, CMOS, Distributed Crossbar, HMA, Memory Cell, MPM, SRAM

Abstract

This paper presents a detailed survey of the technological evolution of Hierarchical Multi-port memory Architectures (HMA). Computers with multiport memories provide better performance when compared to conventional memory systems. The major issues to design multiport memories are high level of integration, large number of ports, high operating speed, and area. HMA is one of the solutions proposed in the literature to design an efficient multiport memory system. This paper presents a detailed survey on HMA.

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Published

2024-02-26

How to Cite

Babu P, R., & Rao K, S. (2024). Hierarchical Multiport Memories: A Survey. COMPUSOFT: An International Journal of Advanced Computer Technology, 2(10), 319–328. Retrieved from https://ijact.in/index.php/j/article/view/57

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Review Article

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